Static Timing Analysis

Project : Motor_PWM_1
Build Time : 01/09/17 13:39:30
Device : CY8C5868AXI-LP035
Temperature : -40C - 85/125C
VDDA : 5.00
VDDABUF : 5.00
VDDD : 5.00
VDDIO0 : 5.00
VDDIO1 : 5.00
VDDIO2 : 5.00
VDDIO3 : 5.00
VUSB : 5.00
Voltage : 5.0
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+ Timing Violation Section
No Timing Violations
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
CyILO CyILO 1.000 kHz 1.000 kHz N/A
CyIMO CyIMO 3.000 MHz 3.000 MHz N/A
CyMASTER_CLK CyMASTER_CLK 24.000 MHz 24.000 MHz N/A
CyBUS_CLK CyMASTER_CLK 24.000 MHz 24.000 MHz N/A
Clock_1 CyMASTER_CLK 3.000 MHz 3.000 MHz 64.990 MHz
CyPLL_OUT CyPLL_OUT 24.000 MHz 24.000 MHz N/A
+ Register to Register Section
+ Setup Subsection
Path Delay Requirement : 333.333ns(3 MHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci 64.990 MHz 15.387 317.946
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 0.760
Route 1 \PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i 0.000
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb 2.740
Route 1 \PWM_1:PWMUDB:tc_i\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 2.527
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb 5.130
Route 1 \PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ SETUP 4.230
Clock Skew 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci 70.537 MHz 14.177 319.156
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb 2.290
Route 1 \PWM_1:PWMUDB:tc_i\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 2.527
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb 5.130
Route 1 \PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ SETUP 4.230
Clock Skew 0.000
\PWM_1:PWMUDB:runmode_enable\/q \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci 74.134 MHz 13.489 319.844
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(3,0) 1 \PWM_1:PWMUDB:runmode_enable\ \PWM_1:PWMUDB:runmode_enable\/clock_0 \PWM_1:PWMUDB:runmode_enable\/q 1.250
Route 1 \PWM_1:PWMUDB:runmode_enable\ \PWM_1:PWMUDB:runmode_enable\/q \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 2.879
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb 5.130
Route 1 \PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ SETUP 4.230
Clock Skew 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 82.734 MHz 12.087 321.246
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 0.760
Route 1 \PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i 0.000
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb 2.740
Route 1 \PWM_1:PWMUDB:tc_i\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 2.527
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 82.754 MHz 12.084 321.249
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 0.760
Route 1 \PWM_1:PWMUDB:sP16:pwmdp:u0.z0__sig\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/z0 \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i 0.000
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0i \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb 2.740
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 2.524
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ SETUP 6.060
Clock Skew 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 91.937 MHz 10.877 322.456
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb 2.290
Route 1 \PWM_1:PWMUDB:tc_i\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_2 2.527
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 91.962 MHz 10.874 322.459
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb 2.290
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/z0_comb \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_2 2.524
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ SETUP 6.060
Clock Skew 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci 95.694 MHz 10.450 322.883
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb 6.220
Route 1 \PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ SETUP 4.230
Clock Skew 0.000
\PWM_1:PWMUDB:runmode_enable\/q \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_1 96.909 MHz 10.319 323.014
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(3,0) 1 \PWM_1:PWMUDB:runmode_enable\ \PWM_1:PWMUDB:runmode_enable\/clock_0 \PWM_1:PWMUDB:runmode_enable\/q 1.250
Route 1 \PWM_1:PWMUDB:runmode_enable\ \PWM_1:PWMUDB:runmode_enable\/q \PWM_1:PWMUDB:sP16:pwmdp:u1\/cs_addr_1 3.009
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ SETUP 6.060
Clock Skew 0.000
\PWM_1:PWMUDB:runmode_enable\/q \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 98.145 MHz 10.189 323.144
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(3,0) 1 \PWM_1:PWMUDB:runmode_enable\ \PWM_1:PWMUDB:runmode_enable\/clock_0 \PWM_1:PWMUDB:runmode_enable\/q 1.250
Route 1 \PWM_1:PWMUDB:runmode_enable\ \PWM_1:PWMUDB:runmode_enable\/q \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 2.879
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
+ Hold Subsection
Source Destination Slack (ns) Violation
\PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci 2.140
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb 2.140
Route 1 \PWM_1:PWMUDB:sP16:pwmdp:u0.co_msb__sig\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/co_msb \PWM_1:PWMUDB:sP16:pwmdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ HOLD 0.000
Clock Skew 0.000
\PWM_1:PWMUDB:genblk1:ctrlreg\/control_2 Net_39/main_0 2.606
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell1 U(3,0) 1 \PWM_1:PWMUDB:genblk1:ctrlreg\ \PWM_1:PWMUDB:genblk1:ctrlreg\/clock \PWM_1:PWMUDB:genblk1:ctrlreg\/control_2 0.360
Route 1 \PWM_1:PWMUDB:control_2\ \PWM_1:PWMUDB:genblk1:ctrlreg\/control_2 Net_39/main_0 2.246
macrocell3 U(3,0) 1 Net_39 HOLD 0.000
Clock Skew 0.000
\PWM_1:PWMUDB:genblk1:ctrlreg\/control_1 Net_39/main_1 2.608
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell1 U(3,0) 1 \PWM_1:PWMUDB:genblk1:ctrlreg\ \PWM_1:PWMUDB:genblk1:ctrlreg\/clock \PWM_1:PWMUDB:genblk1:ctrlreg\/control_1 0.360
Route 1 \PWM_1:PWMUDB:control_1\ \PWM_1:PWMUDB:genblk1:ctrlreg\/control_1 Net_39/main_1 2.248
macrocell3 U(3,0) 1 Net_39 HOLD 0.000
Clock Skew 0.000
\PWM_1:PWMUDB:genblk1:ctrlreg\/control_0 Net_39/main_2 2.611
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell1 U(3,0) 1 \PWM_1:PWMUDB:genblk1:ctrlreg\ \PWM_1:PWMUDB:genblk1:ctrlreg\/clock \PWM_1:PWMUDB:genblk1:ctrlreg\/control_0 0.360
Route 1 \PWM_1:PWMUDB:control_0\ \PWM_1:PWMUDB:genblk1:ctrlreg\/control_0 Net_39/main_2 2.251
macrocell3 U(3,0) 1 Net_39 HOLD 0.000
Clock Skew 0.000
\PWM_1:PWMUDB:genblk1:ctrlreg\/control_7 \PWM_1:PWMUDB:runmode_enable\/main_0 2.612
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell1 U(3,0) 1 \PWM_1:PWMUDB:genblk1:ctrlreg\ \PWM_1:PWMUDB:genblk1:ctrlreg\/clock \PWM_1:PWMUDB:genblk1:ctrlreg\/control_7 0.360
Route 1 \PWM_1:PWMUDB:control_7\ \PWM_1:PWMUDB:genblk1:ctrlreg\/control_7 \PWM_1:PWMUDB:runmode_enable\/main_0 2.252
macrocell2 U(3,0) 1 \PWM_1:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/ce0_comb Net_39/main_4 2.967
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock \PWM_1:PWMUDB:sP16:pwmdp:u1\/ce0_comb 0.720
Route 1 \PWM_1:PWMUDB:cmp1_eq\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/ce0_comb Net_39/main_4 2.247
macrocell3 U(3,0) 1 Net_39 HOLD 0.000
Clock Skew 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb Net_39/main_5 3.020
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/clock \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb 0.780
Route 1 \PWM_1:PWMUDB:cmp1_less\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb Net_39/main_5 2.240
macrocell3 U(3,0) 1 Net_39 HOLD 0.000
Clock Skew 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/ce0 Net_39/main_4 3.787
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock \PWM_1:PWMUDB:sP16:pwmdp:u0\/ce0 0.350
Route 1 \PWM_1:PWMUDB:sP16:pwmdp:u0.ce0__sig\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/ce0 \PWM_1:PWMUDB:sP16:pwmdp:u1\/ce0i 0.000
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/ce0i \PWM_1:PWMUDB:sP16:pwmdp:u1\/ce0_comb 1.190
Route 1 \PWM_1:PWMUDB:cmp1_eq\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/ce0_comb Net_39/main_4 2.247
macrocell3 U(3,0) 1 Net_39 HOLD 0.000
Clock Skew 0.000
\PWM_1:PWMUDB:sP16:pwmdp:u0\/cl0 Net_39/main_5 3.860
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/clock \PWM_1:PWMUDB:sP16:pwmdp:u0\/cl0 0.430
Route 1 \PWM_1:PWMUDB:sP16:pwmdp:u0.cl0__sig\ \PWM_1:PWMUDB:sP16:pwmdp:u0\/cl0 \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0i 0.000
datapathcell2 U(3,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u1\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0i \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb 1.190
Route 1 \PWM_1:PWMUDB:cmp1_less\ \PWM_1:PWMUDB:sP16:pwmdp:u1\/cl0_comb Net_39/main_5 2.240
macrocell3 U(3,0) 1 Net_39 HOLD 0.000
Clock Skew 0.000
\PWM_1:PWMUDB:runmode_enable\/q \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 4.129
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(3,0) 1 \PWM_1:PWMUDB:runmode_enable\ \PWM_1:PWMUDB:runmode_enable\/clock_0 \PWM_1:PWMUDB:runmode_enable\/q 1.250
Route 1 \PWM_1:PWMUDB:runmode_enable\ \PWM_1:PWMUDB:runmode_enable\/q \PWM_1:PWMUDB:sP16:pwmdp:u0\/cs_addr_1 2.879
datapathcell1 U(2,0) 1 \PWM_1:PWMUDB:sP16:pwmdp:u0\ HOLD 0.000
Clock Skew 0.000
+ Clock To Output Section
+ Clock_1
Source Destination Delay (ns)
Net_39/q PWM_Out(0)_PAD 28.273
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell3 U(3,0) 1 Net_39 Net_39/clock_0 Net_39/q 1.250
Route 1 Net_39 Net_39/q Net_41/main_0 2.241
macrocell1 U(3,0) 1 Net_41 Net_41/main_0 Net_41/q 3.350
Route 1 Net_41 Net_41/q PWM_Out(0)/pin_input 6.271
iocell1 P3[7] 1 PWM_Out(0) PWM_Out(0)/pin_input PWM_Out(0)/pad_out 15.161
Route 1 PWM_Out(0)_PAD PWM_Out(0)/pad_out PWM_Out(0)_PAD 0.000
Clock Clock path delay 0.000